@inproceedings{bottcher:hal-03220290, TITLE = {{Resource Optimal Truncated Multipliers for FPGAs}}, AUTHOR = {B{\"o}ttcher, Andreas and Kumm, Martin and de Dinechin, Florent}, URL = {https://inria.hal.science/hal-03220290}, BOOKTITLE = {{ARITH 2021 - 28th IEEE International Symposium on Computer Arithmetic}}, ADDRESS = {Torino, Italy}, PUBLISHER = {{IEEE}}, PAGES = {1-8}, YEAR = {2021}, MONTH = Jun, DOI = {10.1109/ARITH51176.2021.00029}, KEYWORDS = {truncated multiplier ; faithful rounding ; field programmable gate arrays ; multiplier tiling ; integer linear programming ; computer arithmetic}, PDF = {https://inria.hal.science/hal-03220290/file/main.pdf}, HAL_ID = {hal-03220290}, HAL_VERSION = {v1}, }