<?xml version="1.0" encoding="utf-8"?>
<TEI xmlns="http://www.tei-c.org/ns/1.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:hal="http://hal.archives-ouvertes.fr/" xmlns:gml="http://www.opengis.net/gml/3.3/" xmlns:gmlce="http://www.opengis.net/gml/3.3/ce" version="1.1" xsi:schemaLocation="http://www.tei-c.org/ns/1.0 http://api.archives-ouvertes.fr/documents/aofr-sword.xsd">
  <teiHeader>
    <fileDesc>
      <titleStmt>
        <title>HAL TEI export of hal-02135545v2</title>
      </titleStmt>
      <publicationStmt>
        <distributor>CCSD</distributor>
        <availability status="restricted">
          <licence target="https://creativecommons.org/publicdomain/zero/1.0/">CC0 1.0 - Universal</licence>
        </availability>
        <date when="2026-05-18T08:24:45+02:00"/>
      </publicationStmt>
      <sourceDesc>
        <p part="N">HAL API Platform</p>
      </sourceDesc>
    </fileDesc>
  </teiHeader>
  <text>
    <body>
      <listBibl>
        <biblFull>
          <titleStmt>
            <title xml:lang="en">Data and Thread Placement in NUMA Architectures: A Statistical Learning Approach</title>
            <author role="aut">
              <persName>
                <forename type="first">Nicolas</forename>
                <surname>Denoyelle</surname>
              </persName>
              <idno type="halauthorid">886029-0</idno>
              <affiliation ref="#struct-49346"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Brice</forename>
                <surname>Goglin</surname>
              </persName>
              <email type="md5">612c725fb429eb7dcec2d65fbd1628a0</email>
              <email type="domain">inria.fr</email>
              <idno type="idhal" notation="string">brice-goglin</idno>
              <idno type="idhal" notation="numeric">1244</idno>
              <idno type="halauthorid" notation="string">2138-1244</idno>
              <idno type="IDREF">https://www.idref.fr/104493887</idno>
              <idno type="GOOGLE SCHOLAR">https://scholar.google.com/citations?hl=en&amp;user=4k2wmz8AAAAJ</idno>
              <idno type="ORCID">https://orcid.org/0000-0002-8671-4615</idno>
              <affiliation ref="#struct-409750"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Emmanuel</forename>
                <surname>Jeannot</surname>
              </persName>
              <email type="md5">4a501effb46b8bfaa1d1e8e83d04afad</email>
              <email type="domain">inria.fr</email>
              <idno type="idhal" notation="string">emmanuel-jeannot</idno>
              <idno type="idhal" notation="numeric">15678</idno>
              <idno type="halauthorid" notation="string">23673-15678</idno>
              <idno type="IDREF">https://www.idref.fr/084595108</idno>
              <idno type="ORCID">https://orcid.org/0000-0002-3956-2997</idno>
              <affiliation ref="#struct-409750"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Thomas</forename>
                <surname>Ropars</surname>
              </persName>
              <email type="md5">47c0a4bd31df3ee56c4319d328493ae6</email>
              <email type="domain">univ-grenoble-alpes.fr</email>
              <idno type="idhal" notation="string">thomas-ropars</idno>
              <idno type="idhal" notation="numeric">2897</idno>
              <idno type="halauthorid" notation="string">15586-2897</idno>
              <idno type="IDREF">https://www.idref.fr/139979395</idno>
              <idno type="ORCID">https://orcid.org/0000-0002-9461-1165</idno>
              <affiliation ref="#struct-445543"/>
            </author>
            <editor role="depositor">
              <persName>
                <forename>Brice</forename>
                <surname>Goglin</surname>
              </persName>
              <email type="md5">612c725fb429eb7dcec2d65fbd1628a0</email>
              <email type="domain">inria.fr</email>
            </editor>
          </titleStmt>
          <editionStmt>
            <edition n="v1">
              <date type="whenSubmitted">2019-05-21 13:44:11</date>
            </edition>
            <edition n="v2" type="current">
              <date type="whenSubmitted">2019-06-10 18:05:02</date>
              <date type="whenModified">2025-05-26 14:36:02</date>
              <date type="whenReleased">2019-06-11 09:24:18</date>
              <date type="whenProduced">2019-08-05</date>
              <date type="whenEndEmbargoed">2019-06-10</date>
              <ref type="file" target="https://inria.hal.science/hal-02135545v2/document">
                <date notBefore="2019-06-10"/>
              </ref>
              <ref type="file" subtype="author" n="1" target="https://inria.hal.science/hal-02135545v2/file/paper.pdf" id="file-2151943-2143730">
                <date notBefore="2019-06-10"/>
              </ref>
              <ref type="externalLink" target="https://hal.inria.fr/hal-02135545/file/paper.pdf"/>
            </edition>
            <edition n="v3">
              <date type="whenSubmitted">2019-07-30 11:10:07</date>
            </edition>
            <respStmt>
              <resp>contributor</resp>
              <name key="121085">
                <persName>
                  <forename>Brice</forename>
                  <surname>Goglin</surname>
                </persName>
                <email type="md5">612c725fb429eb7dcec2d65fbd1628a0</email>
                <email type="domain">inria.fr</email>
              </name>
            </respStmt>
          </editionStmt>
          <publicationStmt>
            <distributor>CCSD</distributor>
            <idno type="halId">hal-02135545</idno>
            <idno type="halUri">https://inria.hal.science/hal-02135545</idno>
            <idno type="halBibtex">denoyelle:hal-02135545</idno>
            <idno type="halRefHtml">&lt;i&gt;ICPP 2019 - 48th International Conference on Parallel Processing&lt;/i&gt;, Aug 2019, Kyoto, Japan. &lt;a target="_blank" href="https://dx.doi.org/10.1145/3337821.3337893"&gt;&amp;#x27E8;10.1145/3337821.3337893&amp;#x27E9;&lt;/a&gt;</idno>
            <idno type="halRef">ICPP 2019 - 48th International Conference on Parallel Processing, Aug 2019, Kyoto, Japan. &amp;#x27E8;10.1145/3337821.3337893&amp;#x27E9;</idno>
            <availability status="restricted">
              <licence target="https://about.hal.science/hal-authorisation-v1/">HAL Authorization<ref corresp="#file-2151943-2143730"/></licence>
            </availability>
          </publicationStmt>
          <seriesStmt/>
          <notesStmt>
            <note type="audience" n="2">International</note>
            <note type="invited" n="0">No</note>
            <note type="popular" n="0">No</note>
            <note type="peer" n="1">Yes</note>
            <note type="proceedings" n="1">Yes</note>
          </notesStmt>
          <sourceDesc>
            <biblStruct>
              <analytic>
                <title xml:lang="en">Data and Thread Placement in NUMA Architectures: A Statistical Learning Approach</title>
                <author role="aut">
                  <persName>
                    <forename type="first">Nicolas</forename>
                    <surname>Denoyelle</surname>
                  </persName>
                  <idno type="halauthorid">886029-0</idno>
                  <affiliation ref="#struct-49346"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Brice</forename>
                    <surname>Goglin</surname>
                  </persName>
                  <email type="md5">612c725fb429eb7dcec2d65fbd1628a0</email>
                  <email type="domain">inria.fr</email>
                  <idno type="idhal" notation="string">brice-goglin</idno>
                  <idno type="idhal" notation="numeric">1244</idno>
                  <idno type="halauthorid" notation="string">2138-1244</idno>
                  <idno type="IDREF">https://www.idref.fr/104493887</idno>
                  <idno type="GOOGLE SCHOLAR">https://scholar.google.com/citations?hl=en&amp;user=4k2wmz8AAAAJ</idno>
                  <idno type="ORCID">https://orcid.org/0000-0002-8671-4615</idno>
                  <affiliation ref="#struct-409750"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Emmanuel</forename>
                    <surname>Jeannot</surname>
                  </persName>
                  <email type="md5">4a501effb46b8bfaa1d1e8e83d04afad</email>
                  <email type="domain">inria.fr</email>
                  <idno type="idhal" notation="string">emmanuel-jeannot</idno>
                  <idno type="idhal" notation="numeric">15678</idno>
                  <idno type="halauthorid" notation="string">23673-15678</idno>
                  <idno type="IDREF">https://www.idref.fr/084595108</idno>
                  <idno type="ORCID">https://orcid.org/0000-0002-3956-2997</idno>
                  <affiliation ref="#struct-409750"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Thomas</forename>
                    <surname>Ropars</surname>
                  </persName>
                  <email type="md5">47c0a4bd31df3ee56c4319d328493ae6</email>
                  <email type="domain">univ-grenoble-alpes.fr</email>
                  <idno type="idhal" notation="string">thomas-ropars</idno>
                  <idno type="idhal" notation="numeric">2897</idno>
                  <idno type="halauthorid" notation="string">15586-2897</idno>
                  <idno type="IDREF">https://www.idref.fr/139979395</idno>
                  <idno type="ORCID">https://orcid.org/0000-0002-9461-1165</idno>
                  <affiliation ref="#struct-445543"/>
                </author>
              </analytic>
              <monogr>
                <meeting>
                  <title>ICPP 2019 - 48th International Conference on Parallel Processing</title>
                  <date type="start">2019-08-05</date>
                  <date type="end">2019-08-08</date>
                  <settlement>Kyoto</settlement>
                  <country key="JP">Japan</country>
                </meeting>
                <imprint/>
              </monogr>
              <idno type="doi">10.1145/3337821.3337893</idno>
            </biblStruct>
          </sourceDesc>
          <profileDesc>
            <langUsage>
              <language ident="en">English</language>
            </langUsage>
            <textClass>
              <keywords scheme="author">
                <term xml:lang="en">Placement</term>
                <term xml:lang="en">Machine learning</term>
                <term xml:lang="en">Multicore processors</term>
                <term xml:lang="en">Data</term>
                <term xml:lang="en">High-performance computing</term>
                <term xml:lang="en">Numa</term>
                <term xml:lang="en">Threads</term>
              </keywords>
              <classCode scheme="halDomain" n="info.info-ar">Computer Science [cs]/Hardware Architecture [cs.AR]</classCode>
              <classCode scheme="halDomain" n="info.info-mo">Computer Science [cs]/Modeling and Simulation</classCode>
              <classCode scheme="halDomain" n="info.info-dc">Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]</classCode>
              <classCode scheme="halDomain" n="info.info-os">Computer Science [cs]/Operating Systems [cs.OS]</classCode>
              <classCode scheme="halTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halOldTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halTreeTypology" n="COMM">Conference papers</classCode>
            </textClass>
            <abstract xml:lang="en">
              <p>Nowadays, NUMA architectures are common in compute-intensive systems. Achieving high performance for multi-threaded application requires both a careful placement of threads on computing units and a thorough allocation of data in memory. Finding such a placement is a hard problem to solve, because performance depends on complex interactions in several layers of the memory hierarchy. In this paper we propose a black-box approach to decide if an application execution time can be impacted by the placement of its threads and data, and in such a case, to choose the best placement strategy to adopt. We show that it is possible to reach near-optimal placement policy selection. Furthermore, solutions work across several recent processor architectures and decisions can be taken with a single run of low overhead profiling.</p>
            </abstract>
          </profileDesc>
        </biblFull>
      </listBibl>
    </body>
    <back>
      <listOrg type="structures">
        <org type="institution" xml:id="struct-49346" status="VALID">
          <idno type="ROR">https://ror.org/05gvnxz63</idno>
          <orgName>Argonne National Laboratory [Lemont]</orgName>
          <orgName type="acronym">ANL</orgName>
          <desc>
            <address>
              <addrLine>9700 S Cass Ave B109, Lemont, IL, 60439</addrLine>
              <country key="US"/>
            </address>
            <ref type="url">http://www.anl.gov</ref>
          </desc>
        </org>
        <org type="researchteam" xml:id="struct-409750" status="VALID">
          <idno type="RNSR">201521202K</idno>
          <idno type="ROR">https://ror.org/04881e359</idno>
          <orgName>Topology-Aware System-Scale Data Management for High-Performance Computing</orgName>
          <orgName type="acronym">TADAAM</orgName>
          <date type="start">2017-12-01</date>
          <date type="end">2026-06-30</date>
          <desc>
            <address>
              <addrLine>200, avenue de la Vieille Tour 33405 Talence cedex</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.inria.fr/equipes/tadaam</ref>
          </desc>
          <listRelation>
            <relation active="#struct-3102" type="direct"/>
            <relation active="#struct-259761" type="indirect"/>
            <relation active="#struct-300366" type="indirect"/>
            <relation name="UMR5800 / URA1304" active="#struct-441569" type="indirect"/>
            <relation active="#struct-104751" type="direct"/>
            <relation active="#struct-300009" type="indirect"/>
          </listRelation>
        </org>
        <org type="institution" xml:id="struct-445543" status="OLD">
          <idno type="IdRef">188399275</idno>
          <idno type="ROR">https://ror.org/02rx3b187</idno>
          <orgName>Université Grenoble Alpes [2016-2019]</orgName>
          <orgName type="acronym">UGA [2016-2019]</orgName>
          <date type="start">2016-01-01</date>
          <date type="end">2019-12-31</date>
          <desc>
            <address>
              <addrLine>38058 Grenoble cedex</addrLine>
              <country key="FR"/>
            </address>
          </desc>
        </org>
        <org type="laboratory" xml:id="struct-3102" status="VALID">
          <idno type="IdRef">155054465</idno>
          <idno type="ISNI">0000000122898198</idno>
          <idno type="RNSR">199511665F</idno>
          <idno type="ROR">https://ror.org/03adqg323</idno>
          <idno type="Wikidata">Q3214395</idno>
          <orgName>Laboratoire Bordelais de Recherche en Informatique</orgName>
          <orgName type="acronym">LaBRI</orgName>
          <date type="start">1988-01-01</date>
          <desc>
            <address>
              <addrLine>Domaine Universitaire 351, cours de la Libération 33405 Talence Cedex</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.labri.fr</ref>
          </desc>
          <listRelation>
            <relation active="#struct-259761" type="direct"/>
            <relation active="#struct-300366" type="direct"/>
            <relation name="UMR5800 / URA1304" active="#struct-441569" type="direct"/>
          </listRelation>
        </org>
        <org type="institution" xml:id="struct-259761" status="VALID">
          <idno type="IdRef">175206562</idno>
          <idno type="ROR">https://ror.org/057qpr032</idno>
          <orgName>Université de Bordeaux</orgName>
          <orgName type="acronym">UB</orgName>
          <desc>
            <address>
              <addrLine>35, place Pey Berland - 33076 Bordeaux</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.u-bordeaux.fr/</ref>
          </desc>
        </org>
        <org type="institution" xml:id="struct-300366" status="VALID">
          <orgName>École Nationale Supérieure d'Électronique, Informatique et Radiocommunications de Bordeaux (ENSEIRB)</orgName>
          <desc>
            <address>
              <country key="FR"/>
            </address>
          </desc>
        </org>
        <org type="regroupinstitution" xml:id="struct-441569" status="VALID">
          <idno type="IdRef">02636817X</idno>
          <idno type="ISNI">0000000122597504</idno>
          <idno type="ROR">https://ror.org/02feahw73</idno>
          <orgName>Centre National de la Recherche Scientifique</orgName>
          <orgName type="acronym">CNRS</orgName>
          <date type="start">1939-10-19</date>
          <desc>
            <address>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.cnrs.fr/</ref>
          </desc>
        </org>
        <org type="laboratory" xml:id="struct-104751" status="VALID">
          <idno type="RNSR">200818243Z</idno>
          <idno type="ROR">https://ror.org/03tjcj052</idno>
          <orgName>Centre Inria de l'Université de Bordeaux</orgName>
          <desc>
            <address>
              <addrLine>200, avenue de la Vieille Tour, 33405 Talence</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.inria.fr/bordeaux/</ref>
          </desc>
          <listRelation>
            <relation active="#struct-300009" type="direct"/>
          </listRelation>
        </org>
        <org type="institution" xml:id="struct-300009" status="VALID">
          <idno type="ROR">https://ror.org/02kvxyf05</idno>
          <orgName>Institut National de Recherche en Informatique et en Automatique</orgName>
          <orgName type="acronym">Inria</orgName>
          <desc>
            <address>
              <addrLine>Domaine de VoluceauRocquencourt - BP 10578153 Le Chesnay Cedex</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.inria.fr/en/</ref>
          </desc>
        </org>
      </listOrg>
    </back>
  </text>
</TEI>