<?xml version="1.0" encoding="utf-8"?>
<TEI xmlns="http://www.tei-c.org/ns/1.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:hal="http://hal.archives-ouvertes.fr/" xmlns:gml="http://www.opengis.net/gml/3.3/" xmlns:gmlce="http://www.opengis.net/gml/3.3/ce" version="1.1" xsi:schemaLocation="http://www.tei-c.org/ns/1.0 http://api.archives-ouvertes.fr/documents/aofr-sword.xsd">
  <teiHeader>
    <fileDesc>
      <titleStmt>
        <title>HAL TEI export of hal-01456967</title>
      </titleStmt>
      <publicationStmt>
        <distributor>CCSD</distributor>
        <availability status="restricted">
          <licence target="https://creativecommons.org/publicdomain/zero/1.0/">CC0 1.0 - Universal</licence>
        </availability>
        <date when="2026-05-21T05:58:54+02:00"/>
      </publicationStmt>
      <sourceDesc>
        <p part="N">HAL API Platform</p>
      </sourceDesc>
    </fileDesc>
  </teiHeader>
  <text>
    <body>
      <listBibl>
        <biblFull>
          <titleStmt>
            <title xml:lang="en">Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections</title>
            <author role="aut">
              <persName>
                <forename type="first">Anelise</forename>
                <surname>Kologeski</surname>
              </persName>
              <email type="md5">28365ad29393cb6e428f3479f232ca0d</email>
              <email type="domain">inf.ufrgs.br</email>
              <idno type="idhal" notation="numeric">1000384</idno>
              <idno type="halauthorid" notation="string">981411-1000384</idno>
              <affiliation ref="#struct-302610"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Caroline</forename>
                <surname>Concatto</surname>
              </persName>
              <email type="md5">6d0a08a89392e077a336d0dbb7e33249</email>
              <email type="domain">inf.ufrgs.br</email>
              <idno type="idhal" notation="numeric">1000385</idno>
              <idno type="halauthorid" notation="string">1125056-1000385</idno>
              <affiliation ref="#struct-302610"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Fernanda</forename>
                <forename type="middle">Lima</forename>
                <surname>Kastensmidt</surname>
              </persName>
              <email type="md5">a5888b2dde0ef2a8ee0c65d4427e56c2</email>
              <email type="domain">inf.ufrgs.br</email>
              <idno type="idhal" notation="numeric">1000386</idno>
              <idno type="halauthorid" notation="string">1125057-1000386</idno>
              <affiliation ref="#struct-302610"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Luigi</forename>
                <surname>Carro</surname>
              </persName>
              <email type="md5">b6be63c8dc659a9507da98114fbf13a9</email>
              <email type="domain">inf.ufrgs.br</email>
              <idno type="idhal" notation="numeric">840971</idno>
              <idno type="halauthorid" notation="string">213982-840971</idno>
              <affiliation ref="#struct-302610"/>
            </author>
            <editor role="depositor">
              <persName>
                <forename>Hal</forename>
                <surname>Ifip</surname>
              </persName>
              <email type="md5">2073ac78024b6e13f2714db96e9b1e63</email>
              <email type="domain">inria.fr</email>
            </editor>
          </titleStmt>
          <editionStmt>
            <edition n="v1" type="current">
              <date type="whenSubmitted">2017-02-06 10:33:52</date>
              <date type="whenModified">2025-11-06 15:24:03</date>
              <date type="whenReleased">2017-02-06 10:40:05</date>
              <date type="whenProduced">2012-08-07</date>
              <date type="whenEndEmbargoed">2016-01-01</date>
              <ref type="file" target="https://inria.hal.science/hal-01456967v1/document">
                <date notBefore="2016-01-01"/>
              </ref>
              <ref type="file" subtype="author" n="1" target="https://inria.hal.science/hal-01456967v1/file/978-3-642-45073-0_8_Chapter.pdf" id="file-1456967-1531345">
                <date notBefore="2016-01-01"/>
              </ref>
              <ref type="externalLink" target="https://link.springer.com/content/pdf/10.1007%2F978-3-642-45073-0_8.pdf"/>
            </edition>
            <respStmt>
              <resp>contributor</resp>
              <name key="200187">
                <persName>
                  <forename>Hal</forename>
                  <surname>Ifip</surname>
                </persName>
                <email type="md5">2073ac78024b6e13f2714db96e9b1e63</email>
                <email type="domain">inria.fr</email>
              </name>
            </respStmt>
          </editionStmt>
          <publicationStmt>
            <distributor>CCSD</distributor>
            <idno type="halId">hal-01456967</idno>
            <idno type="halUri">https://inria.hal.science/hal-01456967</idno>
            <idno type="halBibtex">kologeski:hal-01456967</idno>
            <idno type="halRefHtml">&lt;i&gt;20th International Conference on Very Large Scale Integration (VLSI-SoC)&lt;/i&gt;, Aug 2012, Santa Cruz, CA, United States. pp.144-161, &lt;a target="_blank" href="https://dx.doi.org/10.1007/978-3-642-45073-0_8"&gt;&amp;#x27E8;10.1007/978-3-642-45073-0_8&amp;#x27E9;&lt;/a&gt;</idno>
            <idno type="halRef">20th International Conference on Very Large Scale Integration (VLSI-SoC), Aug 2012, Santa Cruz, CA, United States. pp.144-161, &amp;#x27E8;10.1007/978-3-642-45073-0_8&amp;#x27E9;</idno>
            <availability status="restricted">
              <licence target="https://creativecommons.org/licenses/by/4.0/">CC BY 4.0 - Attribution<ref corresp="#file-1456967-1531345"/></licence>
            </availability>
          </publicationStmt>
          <seriesStmt>
            <idno type="stamp" n="IFIP">IFIP - International Federation for Information Processing</idno>
            <idno type="stamp" n="IFIP-AICT" corresp="IFIP">IFIP Advances in Information and Communication Technology</idno>
            <idno type="stamp" n="IFIP-TC" corresp="IFIP">IFIP Technical Committees </idno>
            <idno type="stamp" n="IFIP-WG" corresp="IFIP">Working Groups</idno>
            <idno type="stamp" n="IFIP-VLSISOC" corresp="IFIP">IFIP-VLSISOC</idno>
            <idno type="stamp" n="IFIP-TC10" corresp="IFIP-TC">IFIP-TC10</idno>
            <idno type="stamp" n="IFIP-WG10-5" corresp="IFIP-WG">WG10-5: Design and Engineering of Electronic Systems</idno>
            <idno type="stamp" n="IFIP-AICT-418" corresp="IFIP-AICT">VLSI-SoC: FromAlgorithms to Circuits and System-on-Chip Design</idno>
          </seriesStmt>
          <notesStmt>
            <note type="audience" n="2">International</note>
            <note type="invited" n="0">No</note>
            <note type="popular" n="0">No</note>
            <note type="peer" n="1">Yes</note>
            <note type="proceedings" n="1">Yes</note>
          </notesStmt>
          <sourceDesc>
            <biblStruct>
              <analytic>
                <title xml:lang="en">Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections</title>
                <author role="aut">
                  <persName>
                    <forename type="first">Anelise</forename>
                    <surname>Kologeski</surname>
                  </persName>
                  <email type="md5">28365ad29393cb6e428f3479f232ca0d</email>
                  <email type="domain">inf.ufrgs.br</email>
                  <idno type="idhal" notation="numeric">1000384</idno>
                  <idno type="halauthorid" notation="string">981411-1000384</idno>
                  <affiliation ref="#struct-302610"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Caroline</forename>
                    <surname>Concatto</surname>
                  </persName>
                  <email type="md5">6d0a08a89392e077a336d0dbb7e33249</email>
                  <email type="domain">inf.ufrgs.br</email>
                  <idno type="idhal" notation="numeric">1000385</idno>
                  <idno type="halauthorid" notation="string">1125056-1000385</idno>
                  <affiliation ref="#struct-302610"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Fernanda</forename>
                    <forename type="middle">Lima</forename>
                    <surname>Kastensmidt</surname>
                  </persName>
                  <email type="md5">a5888b2dde0ef2a8ee0c65d4427e56c2</email>
                  <email type="domain">inf.ufrgs.br</email>
                  <idno type="idhal" notation="numeric">1000386</idno>
                  <idno type="halauthorid" notation="string">1125057-1000386</idno>
                  <affiliation ref="#struct-302610"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Luigi</forename>
                    <surname>Carro</surname>
                  </persName>
                  <email type="md5">b6be63c8dc659a9507da98114fbf13a9</email>
                  <email type="domain">inf.ufrgs.br</email>
                  <idno type="idhal" notation="numeric">840971</idno>
                  <idno type="halauthorid" notation="string">213982-840971</idno>
                  <affiliation ref="#struct-302610"/>
                </author>
              </analytic>
              <monogr>
                <title level="m">IFIP Advances in Information and Communication Technology</title>
                <meeting>
                  <title>20th International Conference on Very Large Scale Integration (VLSI-SoC)</title>
                  <date type="start">2012-08-07</date>
                  <date type="end">2012-08-10</date>
                  <settlement>Santa Cruz, CA</settlement>
                  <country key="US">United States</country>
                </meeting>
                <editor>Andreas Burg</editor>
                <editor>Ayse Coskun</editor>
                <editor>Matthew Guthaus</editor>
                <editor>Srinivas Katkoori</editor>
                <editor>Ricardo Reis</editor>
                <imprint>
                  <publisher>Springer</publisher>
                  <biblScope unit="serie">VLSI-SoC: From Algorithms to Circuits and System-on-Chip                    Design</biblScope>
                  <biblScope unit="volume">AICT-418</biblScope>
                  <biblScope unit="pp">144-161</biblScope>
                  <date type="datePub">2013</date>
                </imprint>
              </monogr>
              <idno type="doi">10.1007/978-3-642-45073-0_8</idno>
            </biblStruct>
          </sourceDesc>
          <profileDesc>
            <langUsage>
              <language ident="en">English</language>
            </langUsage>
            <textClass>
              <keywords scheme="author">
                <term xml:lang="en">NoC</term>
                <term xml:lang="en">multiple faults</term>
                <term xml:lang="en">interconnections</term>
                <term xml:lang="en">fault tolerance</term>
                <term xml:lang="en">data splitting</term>
                <term xml:lang="en">adaptive routing</term>
              </keywords>
              <classCode scheme="halDomain" n="info">Computer Science [cs]</classCode>
              <classCode scheme="halTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halOldTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halTreeTypology" n="COMM">Conference papers</classCode>
            </textClass>
            <abstract xml:lang="en">
              <p>The use of fault-tolerant mechanism is essential to ensure the correct functionality of integrated circuits after manufacturing due to the massive number of faults that may occur during the process. In this work, we propose a set of fault-tolerant techniques to cope with faulty wires in Network-on-Chip (NoC). The most appropriate technique is chosen by taking into account the number of faulty wires and their location in the NoC. The goal is to combine different techniques to reduce overheads in area, delay and power. The use of testing and diagnosis can minimize costs associated with embedded fault-tolerant mechanisms once the architecture adapts itself to work in different faulty scenarios. The proposed fault-tolerant strategy uses a lightweight adaptive routing combined with data splitting, which is able to send the data in one clock cycle. The power penalty has a low correlation with the number of faulty interconnections. Results for MPEG4 and VOPD applications running on the NoC with different faulty case-study scenarios show that the proposed techniques can tolerate many faulty interconnections with a low area, performance and power overheads.</p>
            </abstract>
            <particDesc>
              <org type="consortium">TC 10</org>
              <org type="consortium">WG 10.5</org>
            </particDesc>
          </profileDesc>
        </biblFull>
      </listBibl>
    </body>
    <back>
      <listOrg type="structures">
        <org type="institution" xml:id="struct-302610" status="VALID">
          <idno type="IdRef">026610566</idno>
          <idno type="ISNI">0000000123250182</idno>
          <idno type="ROR">https://ror.org/041yk2d64</idno>
          <idno type="Wikidata">Q766447</idno>
          <orgName>Universidade Federal do Rio Grande do Sul [Porto Alegre – Brasil] = Federal University of Rio Grande do Sul [Porto Alegre – Brazil]</orgName>
          <orgName type="acronym">UFRGS</orgName>
          <date type="start">1948-01-01</date>
          <desc>
            <address>
              <addrLine>Av. Paulo Gama, 110 - Bairro Farroupilha - Porto Alegre - Rio Grande do Sul</addrLine>
              <country key="BR"/>
            </address>
            <ref type="url">http://www.ufrgs.br/english/home</ref>
          </desc>
        </org>
      </listOrg>
    </back>
  </text>
</TEI>