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                <term xml:lang="en">Security</term>
                <term xml:lang="en"> Testability</term>
                <term xml:lang="en">Scan-based dft</term>
                <term xml:lang="en">Scan attack</term>
                <term xml:lang="en">Scan chain</term>
                <term xml:lang="en">AES</term>
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              <p>Scan-based design-for-testability, which improves access and thus the test quality, is highly vulnerable to scan attack. While in-field test is enabled through the scan design to provide debug capabilities, an attacker can leverage the test mode to leak the secret key of the chip. The scan attack can be thwarted by a simple defense that resets the data upon a switch from the normal mode to the test mode. We proposed a new class of scan attack in [15] using only the test mode of a chip, circumventing this defense. In this book chapter we extend our earlier work by introducing case studies to explain this new attack in greater detail. Furthermore, we study the effectiveness of existing countermeasures to thwart the attack and propose a new input corruption countermeasure that requires a smaller area overhead compared to the existing countermeasures.</p>
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