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Rapport (Rapport De Recherche) Année : 2023

Audio DSP to FPGA Compilation: The Syfala Toolchain Approach

La Chaîne de Compilation Syfala pour le Traitement du Signal Audio sur FPGA

Résumé

The implementation of real-time audio Digital Signal Processing (DSP) on FPGA has been extensively studied in the past. Up to now, Audio IPs were designed either “by hand” in VHDL or using predefined IPs in block synthesis environments. The advent of High Level Synthesis (HLS) allows for a real compilation flow from high-level audio DSP specifications down to FPGA bit-streams. This paper presents the principles and the implementation of the first “audio DSP compiler” targeting FPGAs. Our fully open-source system compiles audio DSP programs down to FPGA hardware and up to actual sound production. Many parameters such as the number of output channels, sampling rate, etc. are adjusted automatically by the compiler. Software interfaces can be generated to control the system in real-time. This compilation flow presents two important technological breakthroughs for audio programmers: achieving ultra-low latency real- time audio DSP (few micro-seconds) and the possibility of easily deploying systems with a large number of audio channels.
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Dates et versions

hal-04099135 , version 1 (23-05-2023)

Identifiants

  • HAL Id : hal-04099135 , version 1

Citer

Maxime Popoff, Romain Michon, Tanguy Risset, Pierre Cochard, Stephane Letz, et al.. Audio DSP to FPGA Compilation: The Syfala Toolchain Approach. RR-9507, Univ Lyon, INSA Lyon, Inria, CITI, Grame, Emeraude. 2023. ⟨hal-04099135⟩
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